Session 27: Power and Compound Semiconductor Devices - Next-Generation Power, Lighting and Logic
Wednesday, December 12, 9:00 a.m.
Co-Chairs: Tsuyoshi Tanaka, Panasonic Corporation Grace Xing, University of Notre Dame
We have introduced technologies for increase in breakdown characteristics of AlGaN/GaN high electron mobility transistors (HEMTs) on a Si substrate. A GaN/AlN strained super-lattice (SLS) buffer has been inserted between a nucleation layer and a thick GaN layer. This technology enables to increase in a total thickness of epitaxial layer, resulting in improvement of both vertical and horizontal breakdown. Deep investigation of geometrical relationship between the pit and the gate finger reveals that breakdown characteristics of the device not only on the pit but also near the pit are degraded. Finally, we fabricated a reasonably long gate-to-drain distance to further improve total breakdown characteristics. To combination of all these technologies, we have achieved very high breakdown voltage (1400 V) with a state-of-the-art FOM (= BV2/Ron) of 2.6×108 V2Ω-1cm2, for AlGaN/GaN HEMTs on Si.
Record device performance was obtained in deeply-scaled self-aligned-gate GaN-HEMTs with heavily-doped n+GaN S/D in direct contact with 2DEG near the gate. 20-nm-gate devices exhibited Ron = 0.23 Ω-mm, Idmax > 4 A/mm, and a broad gm of >1 S/mm over a wide range of Ids from 0.5 to 3.5 A/mm. A record fmax exceeding 500 GHz was demonstrated for the first time.
We have demonstrated high-power and small-size m-plane GaN-LEDs with low efficiency droop operating on over 1000 A/cm2. We have clarified the asymmetric radiation pattern is related to optical output from lateral c-plane surface. Finally, the control of radiation pattern and polarization was realized by striped texture on top m-plane surface.
We demonstrate room-temperature current-injected LEDs based on Ge QDs in PhC nanocavities through lateral PIN diodes. Strong electroluminescence and sharp resonant peaks are observed when the injected current is larger than 50 μA. The output power is measured for the first time, and achieves 6 pW at 3 mA injection.
Excellent device performance of In0.53Ga0.47As Gate-Wrap-Around devices has been demonstrated by novel device design and fabrication process. Good combination of current drive and subthreshold characteristics has been achieved by Wfin=40 nm with SS=80mV/dec and DIBL=20mV/V, which are among the lowest value ever reported for III-V MOSFETs devices.
We have demonstrated the shortest Lch=20nm InGaAs GAA nanowire MOSFETs with ALD Al2O3/LaAlO3 gate stack. ION=850μA/μm at Vdd=0.8V, gm of 1.65mS/μm at Vds=0.5V , lowest SS of 63mV/dec and DIBL of 7mV/V have been achieved. InGaAs GAA technology is a strong candidate for future high-speed low-power logic application.