2005 IEDM Technical Program
SESSION 2: Process Technology — High-k I Metal Gate Stacks
SESSION 3: Integrated Circuits and Manufacturing — Advanced CMOS and Platform Technology
SESSION 4: Process Technology — Advanced Interconnect Technology
SESSION 5: Displays, Sensors, and MEMS — Organic and Flexible Electronics
SESSION 6: CMOS Devices — Mobility Enhancement and Low Resistance Source/Drain
SESSION 7: Solid-State and Nanoelectronic Devices — Non-Volatile Memory Technologies: MONOS and Nanocrystal Memories
SESSION 8: CMOS and Interconnect Reliability — Interconnect, Plasma Damage, and ESD Reliability
SESSION 9: Modeling and Simulation — Compact Models
SESSION 10: CMOS Devices — High Performance CMOS
SESSION 11: Solid-State and Nanoelectronic Devices — Nanotubes and Nanowires for Thermal and Electrical Applications
SESSION 12: Displays, Sensors and MEMS — MEMS Technologies and Applications
SESSION 13: Integrated Circuits and Manufacturing — DRAM and NAND Flash
SESSION 14: Process Technology — Advanced Integration Concepts
SESSION 15: Quantum, Power and Compound Semiconductors — High Performance Si-RF Power and Power- Switching Devices
SESSION 16: CMOS and Interconnect Reliability — Gate Dielectric Breakdown — Modeling and Mechanism
Luncheon Presentation: "Bits and Atoms," Prof. Neil Gershenfeld, Massachusetts Institute of Technology
SESSION 17: Process Technology — High-k II Gate Dielectrics
SESSION 18: Emerging Technologies — Flexible Electronics
SESSION 19: Solid-State and Nanoelectronic Devices — Novel Device Concepts
SESSION 20: CMOS Devices — Strained-Silicon Technology
SESSION 21: Modeling and Simulation — MS Session: Nanowires and Nanotubes
SESSION 22: CMOS and Interconnect Reliability - Process and Electrical Degradation in Flash Memories and Performance Boosted CMOS Devices
SESSION 23: Quantum, Power and Compound Semiconductors — GaN High-Power Devices, Pushing the Limits
SESSION 24: 2005 IEDM Evening Panel Discussion: "Will Non-Volatile Memory Scale Past the End of the Decade?"
SESSION 25: 2005 IEDM Evening Panel Discussion: "Semiconductor Research & Development: Who will do it and who will pay for it in 2010?"
SESSION 26: Modeling and Simulation — Transport in Advanced Planar CMOS Devices
SESSION 27:Process Technologies — Fully-Silicided Gates
SESSION 28: Integrated Circuits and Manufacturing — Advanced SRAM and Novel Integration Technology
SESSION 29: CMOS and Interconnect Reliability — Bias-Temperature Instability and Inteface Traps
SESSION 30: CMOS Devices — SOI and Multi-Gate Devices
SESSION 31: Solid-State and Nanoelectronic Devices — Resistive Switching Memories
SESSION 32: Quantum, Power and Compound Semiconductors — High-Speed Compound Semiconductor Devices for Logic and Communications
SESSION 33: Displays, Sensors and MEMS — Image Sensors and Photon Detectors
SESSION 34: Process Techology — Advanced FEOL Technology
SESSION 35: Integrated Circuits and Manufacturing — Non-Volatile Memories
SESSION 36: CMOS Devices — Advanced Gate Stacks
SESSION 37: Displays, Sensors and MEMS — Thin Film Transistors for Displays and System on Panel
SESSION 38: Solid-State and Nanoelectronic Devices — Active and Passive Components in CMOS-Compatible Technologies
SESSION 39: Modeling and Simulation — Simulation of Doping and Stress Effects in Advanced CMOS
SESSION 40: Quantum, Power and Compound Semiconductors — Silicon Challenges Conventional III-V Light Emitters
SESSION 41: Modeling and Simulation — System Level Device Modeling
©2005 by the IEEE http://www.ieee.org