Evening Panel Discussions

Session 24: 2005 IEDM Evening Panel Discussion

Tuesday, December 6, 8:00 p.m.
International Ballroom East

Will Non-Volatile Memory Scale Past the End of the Decade?

Non-Volatile Memory, mainly Flash memory, has seen explosive growth over the past several years due to the emergence of portable consumer devices such as cell phones, cameras, and music players. This rapid growth is anticipated to continue as the reducing cost of NVM enables large amounts of rugged, low power, solid state storage in a very small space.

Flash memory has followed the scaling evolution of the semiconductor roadmap since its introduction in the late '80's, but further scaling is becoming increasingly complex as some of the fundamental physical charge storage limitations are being approached. While continued research on floating gate techniques should extend the current Flash technology capability through the end of this decade, there is increasing concern about scalability into the next decade. At the same time many new memory storage mechanisms and materials are showing promise as potential Flash replacement.

This panel will attempt to answer the question of Flash scalability by identifying the scaling issues and potential solutions as well as their timing for introduction into the Flash roadmap for the rest of this decade and well into next decade, including the impact of new memory materials or storage mechanisms.

Moderator: Greg Atwood, Intel

Panel Members:

Session 25: 2005 IEDM Evening Panel Discussion

Tuesday, December 6, 8:00 p.m.
International Ballroom Center

Semiconductor Research & Development: Who will do it and who will pay for it in 2010?

Moore's clock is still the major driver of our industry. But the growing technical requirements make manufacturing facilities increasingly expensive. This has caused a rising number of manufacturing joint ventures. But as R&D budgets are increasing faster than chip makers' revenues, and since we don't want to slow down Moore's clock, R&D is consolidating in major initiatives and institutes. As the industry is confronting the challenges of the coming 450mm wafer generation and of replacing the CMOS transistor by a "new switch", some questions seem legitimate: can we afford to slow down the clock? or will the consolidation continue? And if so, will this result in the ultimate global "public-private partnership", necessary to preserve the productivity gains that invigorate other sectors of the economy? What is the role of the equipment and material suppliers?

But there is another aspect that deserves attention. Everybody will agree that technological innovation is an important driver of economic growth. But to what extent are the dynamics of innovation determined by the relations between states and regions, and between governments and firms? Is a "techno-national" approach preferred, in which a nation or region invest heavily in order to exert control over the generation of semiconductor knowledge and attempts to acquire leadership or to avoid delocalization of its industry? Is a "techno-globalist" approach to be preferred, in which states will rather provide the necessary infrastructure for ambitious exploratory research while firms are responsible for technology development? And where does scientific excellence come into the picture? How long can companies do it on their own? What about industrial alliances? What about consortia and/or research institutes? What is the best way to cover the future costs of semiconductor R&D?

To debate these topics we have invited a distinguished panel of leaders from industry and R&D organizations. Coming from Asia, Europe and the US they will be able to present a truly global perspective on these important issues.

Moderator: Gilbert Declerck, IMEC

Panel Members:

©2005 by the IEEE http://www.ieee.org